Radiation-Hardened Dual Gate Semiconductor Transistor Devices

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uspto_patent_959611_rad_hardened_dual_gate_semiconductor_o

May 15, 2017 | Originally published by Date Line: May 15 on

This disclosure is related to the field of semiconductor and electrical systems. In particular, this disclosure includes systems and components including, for example, various embodiments of a new capabilities metal oxide semiconductor (NCMOS). Methods of manufacturing and operation are also included.

Metal Oxide Field Effect Transistors (MOSFETs) are used because of their fast switching, low power capabilities.
Various modifications/improvements in the design, layout, and fabrication of metal-oxide-semiconductor field-effect transistors (MOSFETs) have been made to enhance electrical and radiation performance (e.g., lower power, faster switching, enhanced radiation hardness, etc.). Radiation issues have been discovered and significant research has been devoted to resolve specific radiation issues (e.g., total ionizing dose (TID) and single-event gate rupture issues).

Under normal MOSFET operation, application of an appropriate gate voltage (a gate voltage greater than MOSFET”s gate threshold voltage) forms a conducting path between source and drain (forming a channel region along a surface) allowing current to flow (MOSFET is turned on). Higher gate voltage above threshold voltage equates to higher current flow. An effect of TID is to trap charge, e.g. positive charge, within a gate oxide, which in turn induces a shift in MOSFET gate threshold voltage (e.g., gate threshold voltage changes with TID). If this TID-induced threshold voltage shift becomes sufficiently large, the radiation induced trapped charge interferes with functional behavior of the MOSFET”s gate (e.g., the MOSFET begins to act like electrons are on its MOSFET gate) gradually rendering the MOSFET non-functional (e.g., N-channel MOSFET cannot be turned off while P-channel MOSFET cannot be turned on without exceeding its electrical specification). Methods exist to help resolve TID issues exhibited by MOSFETs.

Unlike a MOSFET, a P-channel Junction-Field-Effect Transistor (JFET) exhibits a natural TID radiation hardness. TID effects in a MOSFET are caused by radiation-induced trapped charge in gate oxide interfering with modulation of semi-conductive channel region; whereas, a JFET does not employ a dielectric material to modulate semi-conductive channel region eliminating the effect of radiation-induced trapped charge.

Some applications involving radio-frequency (RF) applications such as RF mixers, RF amplifiers, RF gain control, and RF detectors may employ two individual transistors (e.g., MOSFETs) to perform an intended function. Presently, dual-gate MOSFETs can be built by packaging two MOSFETs into a hybrid-type package where the two MOSFETs are placed in series but this implementation does not address radiation effects and increases overall cost, weight and size. Another implementation is to place two MOSFETs in series using a monolithic type layout. Again, this implementation does not address radiation effects.

Embodiments of the invention provide improvements to address various disadvantages and provide desired improvements. A variety of MOSFET gate oxide lens structures as well as a current leakage preventing or mitigation structures are also provided. Control systems are also provided to operate various embodiments of the invention in a variety of modes of operation. Methods of manufacturing and operation are also provided.